Semiconductor Engineering

Understanding and Mitigating Column-Based Read Disturbance in DRAM Chips (ETH Zurich, CISPA)

A new technical paper titled “ColumnDisturb: Understanding Column-based Read Disturbance in Real DRAM Chips and Implications for Future Systems” was published by researchers at ETH Zurich and CISPA.
EDN

Rambus: Micro-Threaded Row and Column Operations in a DRAM Core

The technique of micro-threading may be applied to the core of a DRAM to reduce the row and column access granularity. This results in a significant performance benefit for those applications that ...
Ars Technica

There’s a new way to flip bits in DRAM, and it works against the latest defenses

In 2015, researchers reported a surprising discovery that stoked industry-wide security concerns—an attack called RowHammer that could corrupt, modify, or steal sensitive data when a simple user-level ...
Semiconductor Engineering

A Deeper Look into RowHammer’s Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses

Sensitivity of the RowHammer vulnerability to temperature, aggressor row active time, and spatial location of aggressor and victim rows in a DRAM chip. Includes new observations & lower-cost RH ...
Ars Technica

There’s a new way to flip bits in DRAM, and it works against the latest defenses

New technique produces lots of bitflips and could one day help form an attack.