Ars Technica

There’s a new way to flip bits in DRAM, and it works against the latest defenses

In 2015, researchers reported a surprising discovery that stoked industry-wide security concerns—an attack called RowHammer that could corrupt, modify, or steal sensitive data when a simple user-level ...
EDN

Rambus: Micro-Threaded Row and Column Operations in a DRAM Core

The technique of micro-threading may be applied to the core of a DRAM to reduce the row and column access granularity. This results in a significant performance benefit for those applications that ...
Semiconductor Engineering

Decreasing Refresh Latency of Off-the-Shelf DRAM Chips

A new technical paper titled “HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips” was published by researchers at ETH Zürich, TOBB University of Economics and ...
EDN

Speed with flexible design critical to embedded DRAM for SoCs

Steven Tomashot, Senior Technical Staff Member, IBM Microelectronics Division, Essex Junction, Vermont, Subramanian S. Iyer, Manager, System Scale Integration, IBM Microelectronics Division, Hopewell ...
Semiconductor Engineering

Securing DRAM Against Evolving Rowhammer Threats

Advanced process nodes and higher silicon densities are heightening DRAM’s susceptibility to Rowhammer attacks, as reduced cell spacing significantly decreases the hammer count needed for bit flips.