This paper presents a new hardware/software partitioning methodology for SoCs. Target architecture is composed of a RISC host and one or more configurable microprocessors. First, a system is ...

"Our future research will focus on the co-design and optimization of architecture, algorithms, and hardware to enhance the energy efficiency and accuracy of hybrid analog-digital computing systems.

The concept and application of FPGA Coprocessors as a means of delivering hardware IP to software and system engineers is presented. The hardware and software architecture of FPGA coprocessors is ...

NVIDIA’s GTC 2025 spotlighted a sweeping upgrade to its AI infrastructure stack, unveiling new CPU and GPU architectures ...

bringing notable performance improvements and expanded hardware support for AMD, Intel, and RISC-V architectures. This update introduces several key enhancements aimed at optimizing system ...